base on 16-bit CPU for Excel, and related files # Excel 16-Bit CPU The Excel 16-Bit CPU repository contains the following main files: ``` CPU.xlsx - The main spreadsheet which contains the CPU ROM.xlsx - The ROM spreadsheet read by the CPU when the read ROM switch is turned on InstructionSet.xlsx - Explains the ISA of the CPU compileExcelASM16.py - The Excel-ASM16 compiler Excel-ASM16.xml - Markdown for the Excel-ASM16 language compatible with Notepad++ Sample Programs - Folder of sample programs for the Excel CPU ``` The CPU.xlsx file features a 16-bit CPU, 16 general purpose registers, 128KB of RAM, and a 128x128 display. Iterative Calcuation must be turned on. This can be done by going to File -> Options -> Formulas -> then Enable Iterative Calculation and **set Maximum Iterations to 1** The CPU runs off a clock signal set in B2. This clock signal will update under the normal conditions of recalculation within an Excel spreadsheet. Pressing the F9 key will recalculate the spreadsheet. The Reset Button in the F2 cell, if set to true, will reset the PC register back to 0. The computer in the CPU.xlsx file can be controlled either in automatic or manual mode. This is controlled by the button in J2. If set to true, when the clock signal from B2 is high, then the CPU will carry out the operation specified in the override slot in the Fetch Unit in cell D8. If false, then the CPU will execute the operation retrieved from the memory table as specified by the PC register. The Reset RAM button, if set to true, will reset every memory unit to 0. The Read ROM button, if set to true, will copy the values of the memory table in the ROM.xlsx spreadsheet onto the RAM table of the CPU.xlsx spreadsheet. Normal operation of the CPU consists of setting the Reset Button to high, either flipping the Reset RAM or Read ROM buttons on and off again (causing the RAM to be reset or the ROM to be read into the RAM table), and then turning off the Reset Button. The CPU is then set up to either run a program in Manual mode, or will carry out the program specified in RAM. The CPU is designed to run according to the instruction set architecture specified in the InstructionSet.xlsx spreadsheet. Warning: It is not possible to simply mash the F9 key as fast as possible, it takes time for Excel to update so many cells, it is recommended to wait until the text "Ready" can be seen in the bottom left corner of Excel can be seen before continuing to press the F9 key. Alternatively, programs can be written in the Excel-ASM16 language and compiled to the ROM.xlsx spreadsheet. Excel-ASM16 features 24 different case-insensitive instructions. There are three different operands that are used in each instruction ``` REG ; refers to any of the 16 general purpose registers E.G. R0, R1, R15 &c. MEM ; refers to any 16-bit addressable memory unit (formatted in hexadecimal) E.G. @0000, @F000, @FFFF, &c. IMD ; refers to an immediate number usually 16-bits long, except in the case of ROL and ROR ; can be defined either in decimal or hexadecimal E.G. #0000, $0CCC, #60340, $FF10, &c. ``` ### LOAD ``` LOAD REG MEM ; loads the specified memory unit into REG LOAD REG IMD ; load specified 16-bit immediate value into REG LOAD REG REG ; loads memory unit at the address stored in REGB into REGA ``` ### STORE ``` STORE REG MEM ; stores the value of REG to the address specified STORE REG REG ; stores the value of REGA into the memory unit at the address in REGB ``` ### JUMP ``` JMP IMD ; sets PC to the immediate 16-bit value JEQ IMD ; if ZF = 0, sets PC to the immediate 16-bit value JLT IMD ; if CF = 0, sets PC to the immediate 16-bit value JGE IMD ; if CF = 1 or ZF = 1, sets PC to the immediate 16-bit value ``` ### TRAN ``` TRAN REG REG ; transfers value from REGA to REGB ``` ### ALGEBRAIC INSTRUCTIONS ### ADD ``` ADD REG REG ; REGA + REGB + CF, result stored in REGA ``` ### SUB ``` SUB REG REG ; (REGA - REGB) - CF, result stored in REGA ``` ### MULT ``` MULT REG REG ; REGA * REGB, low 16-bit result stored in REGA, high 16-bit result stored in REGB ``` ### DIV ``` DIV REG REG ; REGA / REGB result stored in REGA, REGA MOD REGB stored in REGB ``` ### INC ``` INC REG ; REGA++, CF not affected ``` ### DEC ``` DEC REG ; REGA--, CF not affected ``` ### BITWISE INSTRUCTIONS ### AND ``` AND REG REG ; REGA AND REGB, result stored in REGA ``` ### OR ``` OR REG REG ; REGA OR REGB, result stored in REGA ``` ### XOR ``` XOR REG REG ; REGA XOR REGB, result stored in REGA ``` ### NOT ``` NOT REG ; NOT REGA, result stored in REGA ``` ### ROLL INSTRUCTIONS ### ROL ``` ROL REG IMD ; leftwise roll of bits of REGA carried out IMD times ; IMD is a 4-bit value ``` ### ROR ``` ROR REG IMD ; rightwise roll of bits of REGA carried out IMD times ; IMD is a 4-bit value ``` ### Flag instructions ``` CLC ; sets CF to 0 STC ; sets CF to 1 ``` ### NOP ``` NOP ; does not effect any registers or memory ``` ### ORG ``` ORG IMD ; sets the location of the next instruction ; must be further than the current length of program ``` ### INC ``` INC "file.bin" ; copies the binary file into the program ``` ### Compiling After having written a program, it is compiled with the commandline instruction ``` py compileExcelASM16.py program.s ROM.xlsx ``` Where **program.s** is the user's program file, and ROM.xlsx is the ROM spreadsheet After compiling successfully, the program can be transferred into the CPU.xlsx program by flipping the Read ROM button at the top of the spreadsheet. Note, the ROM.xlsx file must be open for the data to update correctly. ", Assign "at most 3 tags" to the expected json: {"id":"7364","tags":[]} "only from the tags list I provide: [{"id":77,"name":"3d"},{"id":89,"name":"agent"},{"id":17,"name":"ai"},{"id":54,"name":"algorithm"},{"id":24,"name":"api"},{"id":44,"name":"authentication"},{"id":3,"name":"aws"},{"id":27,"name":"backend"},{"id":60,"name":"benchmark"},{"id":72,"name":"best-practices"},{"id":39,"name":"bitcoin"},{"id":37,"name":"blockchain"},{"id":1,"name":"blog"},{"id":45,"name":"bundler"},{"id":58,"name":"cache"},{"id":21,"name":"chat"},{"id":49,"name":"cicd"},{"id":4,"name":"cli"},{"id":64,"name":"cloud-native"},{"id":48,"name":"cms"},{"id":61,"name":"compiler"},{"id":68,"name":"containerization"},{"id":92,"name":"crm"},{"id":34,"name":"data"},{"id":47,"name":"database"},{"id":8,"name":"declarative-gui "},{"id":9,"name":"deploy-tool"},{"id":53,"name":"desktop-app"},{"id":6,"name":"dev-exp-lib"},{"id":59,"name":"dev-tool"},{"id":13,"name":"ecommerce"},{"id":26,"name":"editor"},{"id":66,"name":"emulator"},{"id":62,"name":"filesystem"},{"id":80,"name":"finance"},{"id":15,"name":"firmware"},{"id":73,"name":"for-fun"},{"id":2,"name":"framework"},{"id":11,"name":"frontend"},{"id":22,"name":"game"},{"id":81,"name":"game-engine "},{"id":23,"name":"graphql"},{"id":84,"name":"gui"},{"id":91,"name":"http"},{"id":5,"name":"http-client"},{"id":51,"name":"iac"},{"id":30,"name":"ide"},{"id":78,"name":"iot"},{"id":40,"name":"json"},{"id":83,"name":"julian"},{"id":38,"name":"k8s"},{"id":31,"name":"language"},{"id":10,"name":"learning-resource"},{"id":33,"name":"lib"},{"id":41,"name":"linter"},{"id":28,"name":"lms"},{"id":16,"name":"logging"},{"id":76,"name":"low-code"},{"id":90,"name":"message-queue"},{"id":42,"name":"mobile-app"},{"id":18,"name":"monitoring"},{"id":36,"name":"networking"},{"id":7,"name":"node-version"},{"id":55,"name":"nosql"},{"id":57,"name":"observability"},{"id":46,"name":"orm"},{"id":52,"name":"os"},{"id":14,"name":"parser"},{"id":74,"name":"react"},{"id":82,"name":"real-time"},{"id":56,"name":"robot"},{"id":65,"name":"runtime"},{"id":32,"name":"sdk"},{"id":71,"name":"search"},{"id":63,"name":"secrets"},{"id":25,"name":"security"},{"id":85,"name":"server"},{"id":86,"name":"serverless"},{"id":70,"name":"storage"},{"id":75,"name":"system-design"},{"id":79,"name":"terminal"},{"id":29,"name":"testing"},{"id":12,"name":"ui"},{"id":50,"name":"ux"},{"id":88,"name":"video"},{"id":20,"name":"web-app"},{"id":35,"name":"web-server"},{"id":43,"name":"webassembly"},{"id":69,"name":"workflow"},{"id":87,"name":"yaml"}]" returns me the "expected json"