alfikpl/ao486

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Linux on LiteX-VexRiscv

A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz

A FPGA friendly 32 bit RISC-V CPU implementation

A small, light weight, RISC CPU soft core

Ted Fried's MicroCore Labs Projects - FPGA CPU cores and emulators for the 8088, 8086, 8051, 6502, 68000, Z80, Risc-V, and also Typewriter and EPROM Emulator projects. MCL51, MCL64, MCL65, MCL65+, MCL68, MCL86, MCL86+, MCL86jr, MCLR5, MCLZ8, MCL6809, XTMax, MCL8080+

PicoRV32 - A Size-Optimized RISC-V CPU

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.