slaclab/ruckus

Package manager and build abstraction tool for FPGA/ASIC development

Modular hardware build system

🌱 Open source ecosystem for open FPGA boards

mflowgen

Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)

Build your hardware, easily!

A Python package to use FPGA development tools programmatically.

A huge VHDL library for FPGA and digital ASIC development

ASIC implementation flow infrastructure, successor to OpenLane