pulp-platform/bender

Hog (HDL-on-git) is an open-source tool to manage FPGA projects on git

👾 Design ∪ Hardware

The MyHDL development repository

A Python package for generating HDL wrappers and top modules for HDL sources

Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)

Product Lifecycle Management (PLM) in Git

Package manager and build abstraction tool for FPGA/ASIC development

Design circuit boards with code! ✨ Get software-like design reuse 🚀, validation, version control and collaboration in hardware; starting with electronics ⚡️

An abstraction library for interfacing EDA tools