XUANTIE-RV/riscv-aosp

OpenEmbedded/Yocto layer for RISC-V Architecture

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

BSP kernel source

luckfox-pico sdk

Low level access to RISC-V processors

Open source minimal stack for the ch32 and ch5xx WCH RISC-V Microcontrollers

Open-source high-performance RISC-V processor

RISC-V Supervisor Binary Interface (RISC-V SBI) library in Rust; runs on M or HS mode; good support for embedded Rust ecosystem. For binary download see firmware folder.