Footer

Your go-to destination for discovering trending open-source projects and uncovering the insights that matter

Legal

  • Terms and conditions
  • Privacy policy

More

  • Pricing
  • Advertise
  • onedump
  • gosnakego
  • Contact us

Social

  • X (Twitter)
  • GitHub
Trendshift owl
What they build speaks louder than words
© 2026 Trendshift, created by Julian Li with ❤️
SignalAdvertise
Trendshift
SignalAdvertise
Sign in
Trendshift owl

Discover trends that matter

SignalAdvertise
DailyWeeklyMonthlyYearly
Live mentionsTopics
RepositoriesDevelopers
InsightsStats

Busbar
Busbar
Bifrost
Bifrost
Websitebench
Websitebench
Omnigraph
Omnigraph

riscv/riscv-smmtt

This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant security use cases e.g. confidential-computing, trusted platform services, fault isolation and so on.

Visit GitHub
Shell
75
28
17 contributors
Creative Commons Attribution 4.0 International
website
FeaturedAdvertise to 180K+ monthly visitors
Busbar

Control what AI can do before it acts

Bifrost

Fastest Enterprise AI Gateway for Routing, Governing, and Securing all your AI Traffic

Websitebench

Can AI agents reverse-engineer real websites?

Omnigraph

Versioned graph database on object storage. Git-style workflows and multimodal retrieval

Momentum

How fast riscv/riscv-smmtt is gaining stars, and where it lands on Trendshift and GitHub Trending

Activity and trending

Stars, forks and merged pull requests each day or month, lined up with the repository's rank on Trendshift Trending

Sep 21 – Nov 15, 2026

Stars +2 in 56 days

01
1

Forks +1 in 56 days

01
1

Merged PRs 2 in 56 days

012
2

Trendshift Trendingwhere the repository ranked each day it made the top 25

Not in the Trendshift top 25 in this period

Sep 21Sep 28Oct 5Oct 12Oct 19Oct 26Nov 2Nov 9
The left and right arrow keys step from day to day; Home and End go to the first and the last

Stars, forks, merged pull requests and Trendshift Trending rank, by day
DayStars gainedForks gainedMerged PRs
Mon, Sep 21, 2026+0+00
Tue, Sep 22, 2026+0+00
Wed, Sep 23, 2026+0+00
Thu, Sep 24, 2026+0+00
Fri, Sep 25, 2026+0+00
Sat, Sep 26, 2026+0+00
Sun, Sep 27, 2026+0+00
Mon, Sep 28, 2026+0+00
Tue, Sep 29, 2026+0+00
Wed, Sep 30, 2026+0+00
Thu, Oct 1, 2026+0+00
Fri, Oct 2, 2026+0+00
Sat, Oct 3, 2026+0+00
Sun, Oct 4, 2026+0+00
Mon, Oct 5, 2026+0+00
Tue, Oct 6, 2026+0+00
Wed, Oct 7, 2026+0+00
Thu, Oct 8, 2026+0+00
Fri, Oct 9, 2026+0+00
Sat, Oct 10, 2026+0+00
Sun, Oct 11, 2026+0+00
Mon, Oct 12, 2026+0+00
Tue, Oct 13, 2026+0+00
Wed, Oct 14, 2026+0+00
Thu, Oct 15, 2026+0+10
Fri, Oct 16, 2026+0+00
Sat, Oct 17, 2026+0+00
Sun, Oct 18, 2026+0+00
Mon, Oct 19, 2026+0+00
Tue, Oct 20, 2026+0+00
Wed, Oct 21, 2026+0+00
Thu, Oct 22, 2026+0+00
Fri, Oct 23, 2026+0+00
Sat, Oct 24, 2026+0+00
Sun, Oct 25, 2026+0+00
Mon, Oct 26, 2026+0+00
Tue, Oct 27, 2026+0+00
Wed, Oct 28, 2026+1+00
Thu, Oct 29, 2026+0+00
Fri, Oct 30, 2026+0+00
Sat, Oct 31, 2026+0+00
Sun, Nov 1, 2026+0+00
Mon, Nov 2, 2026+0+00
Tue, Nov 3, 2026+0+00
Wed, Nov 4, 2026+0+00
Thu, Nov 5, 2026+0+00
Fri, Nov 6, 2026+0+00
Sat, Nov 7, 2026+0+00
Sun, Nov 8, 2026+1+00
Mon, Nov 9, 2026+0+02
Tue, Nov 10, 2026+0+00
Wed, Nov 11, 2026+0+00
Thu, Nov 12, 2026+0+00
Fri, Nov 13, 2026+0+00
Sat, Nov 14, 2026+0+00
Sun, Nov 15, 2026+0+00
Total+2+12
  • 1#1 on the list
  • 7Rank that day
  • Not trending

You might also like

Repositories close to riscv/riscv-smmtt
FeaturedAdvertise to 180K+ monthly visitors
Websitebench

Can AI agents reverse-engineer real websites?

Bifrost

Fastest Enterprise AI Gateway for Routing, Governing, and Securing all your AI Traffic

Omnigraph

Versioned graph database on object storage. Git-style workflows and multimodal retrieval

Busbar

Control what AI can do before it acts

riscv/riscv-cheri

Python

This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.

12553

IBM/ACE-RISCV

Rust

Assured confidential execution (ACE) implements VM-based trusted execution environment (TEE) for embedded RISC-V systems with focus on a formally verified and auditable firmware.

22234

TF-RMM/tf-rmm

C

Reference implementation of Arm-CCA RMM specification

8522

keystone-enclave/keystone

C

Keystone Enclave (QEMU + HiFive Unleashed)

537167

diodesign/diosix

Zig

A lightweight, robust, multiprocessor bare-metal hypervisor written in Zig for RISC-V

20918

riscv-non-isa/riscv-iommu

C

RISC-V IOMMU Specification

17335

intel/confidential-computing.tdx.tdx-module

Trust Domain Extensions (TDX) is introducing new, architectural elements to help deploy hardware-isolated, virtual machines (VMs) called trust domains (TDs). Intel TDX is designed to isolate VMs from the virtual-machine manager (VMM)/hypervisor and any other non-TD software on the platform to protect TDs from a broad range of software.

11726

islet-project/islet

Rust

An on-device confidential computing platform

14132

toddmaustin/mojo-v

C

Mojo-V: A RISC-V instruction set extension for privacy-oriented programming. Mojo-V allows programmers to write software that computes on data that no software or person can see, except the data owner. Mojo-V implements this novel form of secret computation using simple extensions to a RISC-V CPU.

1539