tukl-msd/DRAMSys

Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and evaluation of new memory system designs (e.g., new DRAM standards, emerging RowHammer mitigation techniques). Described in our IEEE CAL 2023 paper: https://arxiv.org/pdf/2308.11030.

CXLMemSim: Practical Performance Simulation and Characterization of CXL 3.0 Memory Systems

ChampSim is an open-source trace based simulator maintained at Texas A&M University and through the support of the computer architecture community.

Small footprint and configurable DRAM core

The official repository for the gem5 computer-system architecture simulator.

An open-source static random access memory (SRAM) compiler.

Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework

FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility

The Herd toolsuite to deal with .cat memory models (version 7.xx)