microsoft/brainsmith

An AI accelerator implementation with Xilinx FPGA

The Open Source Hardware Accelerator for Efficient Neural Network Inference

Dataflow compiler for QNN inference on FPGAs

A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

Gati Accelerates Your CNN Algorithms!

Allo Accelerator Design and Programming Framework (PLDI'24)

The shortest path from PyTorch to custom ASICs.

An Open Workflow to Build Custom SoCs and run Deep Models at the Edge

FINN+ is an extended version of FINN, a dataflow compiler for QNN inference on FPGAs. It is maintained by a group of researchers at Paderborn University, Germany.