FeSens/openTPU

Opensource software/hardware platform to build edge AI solutions deployed on FPGA or custom ASIC hardware.

A close-to-metal Python API for programming AMD Ryzen™ AI NPUs (AI Engines), built on an open-source MLIR-based compiler toolchain.

Tenstorrent's MLIR Based Compiler. We aim to enable developers to run AI on all configurations of Tenstorrent hardware, through an open-source, general, and performant compiler.

Get Started From Here. The main repo for the whole open-rdma project. Including introduction, hands-on guide, new events and many other things.

An inference chip design that runs a real LLM (Qwen2.5-0.5B) on FPGA — one transformer decoder layer in RTL, every silicon value bit-exact against a golden model. 0.56 tok/s measured, a 140× climb, full evidence trail.

Run generative AI models in sophgo BM1684X/BM1688

Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.

Dataflow compiler for QNN inference on FPGAs

🪙 TT-NN operator library, and TT-Metalium low level kernel programming model.