stnolting/neorv32-setups

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

Linux on LiteX-VexRiscv

Learning FPGA, yosys, nextpnr, and RISC-V

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

RISC-V CPU for OpenFPGAs, in Icestudio

A FPGA friendly 32 bit RISC-V CPU implementation

Various projects for the Nexys4DDR board from Digilent

A RISC-V Core (RV32I) written in Chisel HDL