XS-MLVP/picker

xverif is a local toolkit for chip-verification debug agents. It contains deterministic tools for design and waveform debug, coverage, bit calculations, structured entry decoding, log source locations, SVA semantics, persistent verification knowledge, and a unified MCP entry point

cocotb: Python-based chip (RTL) verification

UnityChip Verification AI-Agent

The UVM written in Python

AI-powered SystemVerilog development assistant — design, verify, debug, and deliver working RTL with natural language.

Repurposing existing HDL tools to help writing better code

Agent skill for Verilog-2001 RTL generation and FPGA design workflows.

Verilator open-source SystemVerilog simulator and lint system

Test suite designed to check compliance with the SystemVerilog standard.