google-research/circuit_training

OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

Build your hardware, easily!

Berkeley's Spatial Array Generator

Yosys Open SYnthesis Suite

Chisel: A Modern Hardware Design Language

Verilog to Routing -- Open Source CAD Flow for FPGA Research

Design circuit boards with code! ✨ Get software-like design reuse 🚀, validation, version control and collaboration in hardware; starting with electronics ⚡️

nextpnr portable FPGA place and route tool