sheldonucr/ucr-eecs168-lab

Digital HDL Design Full-stack Agents

A browser-based SPICE circuit simulator

Bridge between LLM-Agent and Cadence Virtuoso. A new infrastructure for Agentic Analog and Mixed-Signal Design.

Course material for a basic hands-on analog circuit design course with IC emphasis

Agent skill for Verilog-2001 RTL generation and FPGA design workflows.

Verilog HDL files

PSLab Hardware Design and Schematics https://pslab.io

A curated list of awesome resources for Electronic Engineers and hobbyists

Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.