Wren6991/Hazard3

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

A FPGA friendly 32 bit RISC-V CPU implementation

PicoRV32 - A Size-Optimized RISC-V CPU

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

RSD: RISC-V Out-of-Order Superscalar Processor

A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz

Ibex is a small 32-bit RISC-V CPU core with high-level of verification (previously known as zero-riscy)

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

A small, light weight, RISC CPU soft core