hkust-zhiyao/RTLLM

Agent skill for Verilog-2001 RTL generation and FPGA design workflows.

Digital HDL Design Full-stack Agents

[AAAI 2025 Oral] AnalogCoder: Analog Circuit Design via Training-Free Code Generation

EPFL logic synthesis benchmarks

Rigourous evaluation of LLM-synthesized code - NeurIPS 2023 & COLM 2024

A benchmark to evaluate language models on questions I've previously asked them to solve.

KernelBench: Can LLMs Write GPU Kernels? - Benchmark + Toolkit with Torch -> CUDA (+ more DSLs)

This is the official code for the paper CodeRL: Mastering Code Generation through Pretrained Models and Deep Reinforcement Learning (NeurIPS22).

Bridge between LLM-Agent and Cadence Virtuoso. A new infrastructure for Agentic Analog and Mixed-Signal Design.