viktor-prutyanov/drec-fpga-intro

Learning FPGA, yosys, nextpnr, and RISC-V

FPGA exercise for beginners

Verilog HDL files

FPGA 101 lessons/labs

Introduction to Chip Design

Digital Design with Chisel

Laboratory course on RISC-V Processor Development

Generator Bootcamp Material: Learn Chisel the Right Way

Open-source FPGA development board for education and digital design learning. Designed for accessibility, reproducibility and seamless integration with open FPGA toolchains for students, makers and academic environments.