schoeberl/chisel-book

Generator Bootcamp Material: Learn Chisel the Right Way

Chisel: A Modern Hardware Design Language

Learning FPGA, yosys, nextpnr, and RISC-V

BaseJump STL: A Standard Template Library for SystemVerilog

Scala based HDL

Open Source Introductory Systems Programming Textbook for the University of Illinois

OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

Veryl: A Modern Hardware Description Language

Build your hardware, easily!