black-parrot/black-parrot

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

Open-source high-performance RISC-V processor

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Ibex is a small 32-bit RISC-V CPU core with high-level of verification (previously known as zero-riscy)

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

RSD: RISC-V Out-of-Order Superscalar Processor

CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.